The 74F322 is an 8-bit shift register with provision for either serial or parallel loading and with 3-State parallel outputs plus a bi-state serial output. Parallel data inputs and outputs are multiplexed to minimize pin count. State changes are initiated by the rising edge of the clock. Four synchronous modes of operation are possible: hold (store), shift right with serial entry, shift right with sign extend, and parallel load. An asynchronous Master Reset (MR) input overrides clocked operation and clears the registers.