The 74AUP1G373 provides the single D-type transparent latch with 3-state output. While the latch-enable (LE) input is high, the Q output follows the data (D) input. When pin LE is LOW, the latch stores the information that was present at the D-input one set-up time preceding the HIGH-to-LOW transition of pin LE. When pin OE is LOW, the contents of the latch is available at the (Q) output. When pin OE is HIGH, the output goes to the high-impedance OFF-state. Operation of input pin OE does not affect the state of the latch.