The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels. The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 feature programmable DC balance, which allows isolation between a serializer and deserializer using AC-coupling. Each deserializer decodes data transmitted by one of MAX9209/MAX9211/MAX9213/ MAX9215 serializers.