The 4x/2x/1x programmable interpolation filters feature excellent passband distortion and noise performance. Interpolating filters minimize the design complexity of analog reconstruction filters while lowering the data bus and the clock speeds of the digital interface. The PLL multiplier generates all internal, synchronized highspeed clock signals for interpolating filter operation and DAC core conversion. The internal PLL helps minimize system complexity and lower cost. To reduce the I/O pin count, the DAC can also operate in interleave data mode. This allows the MAX5858A to be updated on a single 10-bit bus.