The MAX5065/MAX5067 also feature a clock input (CLKIN) for synchronization to an external clock, and a clock output (CLKOUT) with programmable phase delay (relative to CLKIN) for paralleling multiple phases. The MAX5065/MAX5067 also limit the reverse current if the bus voltage becomes higher than the regulated output voltage. These devices are specifically designed to limit current sinking when multiple power-supply modules are paralleled. The MAX5065 offers an adjustable +0.6V to +3.3V output voltage. The MAX5067 output voltage is adjustable from +0.8V to +3.3V and features an overvoltage protection and a power-good output signal. The MAX5065/MAX5067 operate over the extended temperature range (-40C to +85C). The MAX5065 is available in a 28-pin SSOP package. The MAX5067 is available in a 44-pin thin QFN package. Refer to the MAX5037A data sheet for a VRM 9.0/VRM 9.1-compatible, VID-controlled output voltage controller in a 44-pin QFN package.