The MAX3890 serializer is ideal for converting 16-bitwide, 155Mbps parallel data to 2.5Gbps serial data in ATM and SDH/SONET applications. Operating from a single +3.3V supply, this device accepts low-voltage differential-signal (LVDS) clock and data inputs for interfacing with high-speed digital circuitry, and delivers positive-referenced emitter-coupled logic (PECL) serial data and clock outputs. A fully integrated phaselocked loop (PLL) synthesizes an internal 2.5GHz serial clock from a 155.52MHz, 77.76MHz, 51.84MHz, or 38.88MHz reference clock. A loopback data output is provided to facilitate system diagnostic testing.