The MAX3831/MAX3832 are 4:1 multiplexers (muxes) and 1:4 demultiplexers (demuxes) with automatic channel assignment. Operating from a single +3.3V supply, the mux receives four parallel, 622Mbps SDH/SONET channels. These channels are bit interleaved to generate a serial data stream of 2.488Gbps for interfacing to an optical or an electrical driver. A 10-bit-wide elastic buffer tolerates up to 7.5ns skew between any parallel data input and the reference clock. An external 155MHz reference clock is required for the on-chip PLL to synthesize a high-frequency 2.488GHz clock for timing the outgoing data streams. The MAX3831/MAX3832's demux receives 2.488Gbps serial data and the 2.488GHz clock from an external clock/data recovery device (MAX3876), converting it to four 622Mbps LVDS outputs. The MAX3831 provides a 622MHz LVDS clock output, and the MAX3832 provides a 155MHz LVDS clock output. An internal frame detector looks for a 622Mbps SDH/SONET framing pattern and rolls the demux to maintain proper channel assignment at the outputs.