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| Partname: | ZL30406QGC |
| Description: | SONET/SDH clock multiplier PLL. |
| Manufacturer: | Zarlink Semiconductor |
| Package: | TQFP |
| Pins: | 64 |
| Oper. temp.: | -40 to 85 |
| Datasheet: | PDF (345K).
Click here to download *) |
The ZL30406 accepts a CMOS compatible reference at 19.44 MHz and generates four LVPECL differential output clocks at 77.76 MHz, a CML differential clock programmable to 19.44 MHz, 38.88 MHz, 77.76 MHz and 155.52 MHz and a single-ended CMOS clock at 19.44 MHz. The output clocks can be individually enabled or disabled. |
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Click here to download ZL30406QGC Datasheet*) |
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