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Partname: | WEDPND16M72S-250BI |
Description: | 250MHz; 2.5V power supply; 16M x 72 DDR SDRAM |
Manufacturer: | |
Package: | PBGA |
Pins: | 219 |
Oper. temp.: | -40 to 85 |
Datasheet: | PDF (442K). Click here to download *) |
The 128 MB DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the 128MB DDR SDRAM effectively consists of a single 2n-bit wide, one-clock-cycle data tansfer at the internal DRAM core and two corresponding n-bit wide, one-half-clock-cycle data transfers at the I/O pins. |
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Click here to download WEDPND16M72S-250BI Datasheet*) |
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