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| Partname: | EDI88512C100CC |
| Description: | 100ns; 5V power supply; 512K x 8 monolithic SRAM CMOS |
| Manufacturer: | |
| Package: | DIP |
| Pins: | 32 |
| Oper. temp.: | 0 to 70 |
| Datasheet: | PDF (121K).
Click here to download *) |
The 32 pin DIP pinout adheres to the JEDEC evolutionary standard for the four megabit device. Both the DIP and CSOJ packages are pin for pin upgrades for the single chip enable 128K x 8, the EDI88128C. Pins 1 and 30 become the higher order addresses. A Low Power version with Data Retention (EDI88512LP) is also available for battery backed applications. Military product is available compliant to Appendix A of MIL-PRF-38535. |
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Click here to download EDI88512C100CC Datasheet*) |
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