The VSC8169 is a 16:1 multiplexer with integrated clock generator for use in SONET/SDH systems operating at a standard 2.48832Gb/s data rate or a forward error correction (FEC) data rate up to 2.7Gb/s. The internal clock generator uses a Phase-Locked Loop (PLL) to multiply either a 77.76MHz (up to 84.38MHz-FEC) or a 155.52MHz (up to 168.75MHz -FEC) reference clock in order to provide the 2.48832GHz (up to 2.7GHz FEC) clock for internal logic and output retiming. For use with the VSC9210 FEC Encoder/Decoder chipset running at 2.654208Gb/s, a reference clock of 82.944MHz (serial rate divided by 32) should be used. The 16-bit parallel interface incorporates an on-board FIFO eliminating loop timing design issues by providing a flexible parallel timing architecture. The device operates using a 3.3V power supply, and is packaged in a thermallyenhanced plastic package. The thermal performance of the 128-pin PQFP allows the use of the VSC8169 without a heat sink under most thermal conditions.