The VSC7133 is a full-speed Fibre Channel and Gigabit Ethernet Transceiver with industry-standard pinouts. It accepts 10-bit 8B/10B encoded transmit data, latches it on the rising edge of the TTL/PECL REFCLK and serializes it onto the TX PECL differential outputs at a baud rate which is ten times the REFCLK frequency. Serial data input on the RX PECL differential inputs is resampled by the Clock Recovery Unit, deserialized onto the 10-bit receive data bus synchronously to complementary divide-by-twenty clocks. The VSC7133 receiver detects "Comma" characters for frame alignment. An analog/digital signal detection circuit indicates that a valid signal is present on the RX input. A cable equalizer compensates for Inter Symbol Interference in order to increase maximum cable distances. The VSC7133 contains PLL circuitry for synthesis of the baud-rate transmit clock, and extraction of the clock from the received serial stream. The VSC7133 is similar to the VSC7123 but has either a TTL or a PECL reference clock.