The device consumes very little power due to the 3.3-V supply and an innovative single-pipeline architecture implemented in a CMOS process. The user obtains maximum flexibility by setting both bottom and top voltage references from user-supplied voltages. If no external references are available, on-chip references are available for internal and external use. The full-scale range is 1 Vpp up to 1.6 Vpp, depending on the analog supply voltage. If external references are available, the internal references can be disabled independently from the rest of the chip, resulting in an even greater power saving. ORDERING INFORMATION