The SN54LS224A and SN74LS224A 64-bit, low-power Schottky memories are organized as 16 words by 4 bits each. They can be expanded in multiples of 15m + 1 words or 4n bits, or both (where n is the number of packages in the vertical array and m is the number of packages in the horizontal array); however, some external gating is required. For longer words, the input-ready (IR) signals of the first-rank packages and output-ready (OR) signals of the last-rank packages must be ANDed for proper synchronization.