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Partname:SN74LV161284DLRG4
Description:19-BIT BUS INTERFACE
Manufacturer:Texas Instruments
Datasheet:PDF (329K).
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The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the B, Y, and PERI LOGIC OUT outputs are in a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive requirements as specified in the IEEE Std 1284-I (level-1 type) and IEEE Std 1284-II (level-2 type) parallel peripheral-interface specifications. Except for HOST LOGIC IN and PERI LOGIC OUT, all cable-side pins have a 1.4-k integrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low state or if the output voltage is above VCC CABLE. If VCC CABLE is off, PERI LOGIC OUT is set to low.

Click here to download SN74LV161284DLRG4 Datasheet
Click here to download SN74LV161284DLRG4 Datasheet
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