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Partname:SN65LVDS108DBTG4
Description:1:8 LVDS Clock Fanout Buffer
Manufacturer:Texas Instruments
Datasheet:PDF (284K).
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The SN65LVDS108 is configured as one differential line receiver connected to eight differential line drivers. Individual output enables are provided for each output and an additional enable is provided for all outputs. The line receivers and line drivers implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644, is a data signaling technique that offers low power, low noise emission, high noise immunity, and high switching speeds. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)

Click here to download SN65LVDS108DBTG4 Datasheet
Click here to download SN65LVDS108DBTG4 Datasheet
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