These devices contain an 8-bit serial-in, parallelout shift register that feeds an 8-bit D-type storage register. Separate clocks (RCLK, SRCLK) and direct overriding clear (RCLR, SRCLR) inputs are provided on the shift and storage registers. A serial output (QH) is provided for cascading purposes. The shift-register (SRCLK) and storage-register (RCLK) clocks are positive-edge triggered. If the clocks are tied together, the shift register always is one clock pulse ahead of the storage register. The SN54LV594A is characterized for operation over the full military temperature range of 55C to 125C. The SN74LV594A is characterized for operation from 40C to 85C.