The SMJ320C50KGD digital signal processor (DSP) is a high-performance, 16-bit, fixed-point processor manufactured in 0.64-m double-level metal CMOS technology. The SMJ320C50 KGD employs the hot-chuck-probe process. This process uses standard probed product that is tested again, this time at full data sheet specifications, in wafer form at speed and elevated temperature (125C). Each individual die is then sawed, inspected, and packaged for shipment. A number of enhancements to the basic 'C2x architecture give the 'C50 a minimum 2x performance over the previous generation. A four-deep instruction pipeline, which incorporates delayed branching, delayed call to a subroutine, and delayed return from a subroutine, allows the 'C50 to perform instructions in fewer cycles. The addition of a PLU gives the 'C50 a method of manipulating bits in data memory without using the ACC and the ALU. The 'C50 has additional shifting and scaling capabilities for proper alignment of multiplicands or for storage of values to data memory.