The GC5322 is a wideband digital predistortion transmit processor that includes a digital upconverter (DUC) block, a crest factor reduction (CFR) block, and a digital predistortion (DPD) block with its associated feedback chain and capture buffers. The GC5322 processes composite input bandwidths of up to 40 MHz and processes DPD sample rates of up to 140 MHz. The GC5322 DUC block accepts baseband signals over an interleaved parallel interface at a data rate of up to 93.3 MSPS. The GC5322 CFR block reduces the peak-to-average ratio (PAR) of wideband digital signals provided in quadrature (I/Q) format, such as those used in third-generation (3G) code division multiple access (CDMA) wireless and orthogonal frequency division multiple access (OFDMA) applications. The GC5322 DPD block reduces adjacent-channel leakage ratio (ACLR), or out-of-band energy, by 20 dB to 30 dB or more. The efficiency of follow-on power amplifiers (PAs) is substantially improved by reducing the PAR and ACLR of digital signals. The digital-to-RF conversion can be further simplified by the fractional interpolator between the CFR and the DPD blocks, and a bulk upconverter (BUC) in the final stage of the GC5322. This feature typically eliminates the need for superheterodyne (dual-stage) upconversion architectures. Transmit and feedback NCO/mixers provide additional flexibility in the system frequency planning. To request more information on the GC5322 Wideband Digital Pre-Distortion Transmit Processor, go to http://www.ti.com/gc5322-info. 1