These 16-bit transceivers are designed for use in bidirectional synchronous communication between two buses, where high speed and low power are required. With the exception of the CY74FCT16245T, these devices can be operated either as two independent octals or a single 16-bit transceiver. Direction of data flow is controlled by (DIR), the Output Enable (OE) transfers data when LOW and isolates the buses when HIGH. The output buffers are designed with power off disable capability to allow for live insertion of boards. The CY74FCT16245T is ideally suited for driving high-capacitance loads and low-impedance backplanes.