The CDCP1803 clock driver distributes one pair of differential clock inputs to three pairs of LVPECL differential clock outputs Y[2:0] and Y[2:0], with minimum skew for clock distribution. The CDCP1803 is specifically designed for driving 50- transmission lines. The CDCP1803 has three control pins, S0, S1, and S2, to select different output mode settings, see Table 1 for details. The CDCP1803 is characterized for operation from -40C to 85C. For use in single-ended driver applications, the CDCP1803 also provides a VBB output pin that can be directly connected to the unused input as a common-mode voltage reference.