The CDC922 is a clock synthesizer/driver that generates CPU, CPU_DIV2, 3V66, PCI, APIC, 48MHz, and REF system clock signals to support computer systems with a single Pentium III class microprocessor. All output frequencies are generated from a 14.318-MHz crystal input. Instead of a crystal, a reference clock input can be provided at the XIN input. Two phase-locked loops (PLLs) are used to generate the host frequencies and the 48-MHz clock frequency. On-chip loop filters and internal feedback eliminate the need for external components.