The differential output of the multiplexer is accessible to allow signal conditioning prior to the input of the ADC. Internal system monitor registers provide supply voltage, temperature, reference voltage, gain, and offset data. An onboard PLL generates the system clock from a 32.768-kHz crystal, or can be overridden by an external clock source. A buffered system clock output (15.7 MHz) is provided to drive a microcontroller or additional converters.