|
|
Partname: | 74GTL16622ADGGRE4 |
Description: | 18-Bit LVTTL To GTL/GTL+ Bus Transceiver |
Manufacturer: | Texas Instruments |
Datasheet: | PDF (136K). Click here to download *) |
The user has the flexibility of using this device at either GTL (VTT = 1.2 V and VREF = 0.8 V) or the preferred higher noise margin GTL+ (VTT = 1.5 V and VREF = 1 V) signal levels. GTL+ is the Texas Instruments derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3. The B port normally operates at GTL or GTL+ signal levels, while the A-port and control inputs are compatible with LVTTL logic levels and are 5-V tolerant. VREF is the reference input voltage for the B port. Data flow in each direction is controlled by the output-enable (OEAB and OEBA) and clock (CLKAB and CLKBA) inputs. The clock-enable (CEAB and CEBA) inputs control each 9-bit transceiver independently, which makes the device more versatile. |
|
Click here to download 74GTL16622ADGGRE4 Datasheet*) |
|
*)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |
|
|
|