These octal bus transceivers are designed for asynchronous communication between data buses. The control function implementation allows for maximum flexibility in timing. These devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the output-enable (OEAB or OEBA) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of OEAB and OEBA. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be complementary for the 74AC11623. The 74AC11623 is characterized for operation from 40C to 85C. FUNCTION TABLE