The 'HC590A contain an 8-bit binary counter that feeds an 8-bit storage register. The storage register has parallel outputs. Separate clocks are provided for both the binary counter and storage register. The binary counter features direct clear (CCLR) and count-enable (CCKEN) inputs. A ripple-carry output (RCO) is provided for cascading. Expansion is easily accomplished for two stages by connecting RCO of the first stage to CCKEN of the second stage. Cascading for larger count chains can be accomplished by connecting RCO of each stage to the counter clock (CCLK) input of the following stage.