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Partname: | TP0620 |
Description: | P-Channel Enhancement-Mode Vertical DMOS FETs |
Manufacturer: | |
Datasheet: | PDF (477K). Click here to download *) |
These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. |
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![Click here to download TP0620 Datasheet](../../../pndecoder/datasheets/SUTEX/img/000323.gif) Click here to download TP0620 Datasheet*) |
![](http://www.chipdocs.com/common/img/1x10t.gif) |
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