The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active LOW. Presetting is synchronous on the rising edge of the clock, the function is cleared asynchronously. Two enable inputs (TE and PE) and CARRY output are provided to enable easy cascading of counters, which facilities easy implementation of N-bit counters without using external gates. All inputs are equipped with protection circuits against static discharge and transient excess voltage.