The application circuits were designed to achieve the optimum combination of P1dB and OIP3 while maintaining flat gain and reasonable return losses. Special consideration was given to insure amplifier stability at low frequencies where the device exhibits high gain. These designs were created to illustrate the general performance capabilities of the device under CW conditions. Users may wish to modify these designs to achieve optimum performance under specific input conditions and system requirements. The circuits contain only surface mountable devices and were designed with automated manufacturing requirements in mind. All recommended components are standard values available from multiple manufacturers. The components specified in the bill of materials (BOM) have known parasitics, which in some cases are critical to the circuit's performance. Deviating from the recommended BOM may result in a performance shift due to varying parasitics primarily in the inductors and capacitors.