The Si5022/23 is a fully integrated, high performance limiting amp and clock and data recovery (CDR) IC for high-speed serial communication systems. It extracts timing information and data from a serial input at OC-48/12/3, STM-16/4/1, or Gigabit Ethernet (GbE) rates. Support for 2.7 Gbps data streams is also provided for OC-48/STM-16 applications that employ forward error correction (FEC). An external reference clock is not required; applications with or without an external reference clock are supported. Silicon Laboratories' DSPLLTM technology eliminates sensitive noise entry points thus making the PLL less susceptible to board-level interaction and helping to ensure optimal jitter performance. The Si5022/23 represents a new standard in low jitter, low power, small size, and integration for high speed LA/CDRs. It operates from either a 3.3 V (Si5023) or 2.5 V (Si5022) supply over the industrial temperature range (40C to 85C).