The input port and the output port operate independently of each other. Write operations are performed on the rising edge of the input clock CKI, and enabled by two enabled signals ENI1, ENI2. Read operations are performed on the rising edge of the output clock CKO and enabled by two enabled signals ENO1, ENO2. Five status flags are available to monitor the memory array status: Full, Almost-Full, Half-Full, Almost-Empty, and Empty. The Almost-Full and Almost-Empty flags are initialized to a default offset of eight locations from their respective boundaries, but they are each programmable over the entire FIFO depth.