The SK2111 accepts LVDS signal levels, LVPECL levels directly or PECL with attenuation network resistors. The inputs of SK2111 have an on-chip 100 termination resistors to minimize the component count. The OE input is synchronous so that the outputs will only be enabled/disabled when they are already in the low state. This feature prevents generating any runt clocks. The EDQUAD LQFP package has an exposed heatslug which is connected to VEE substrate.