The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides inverting outputs and symmetrical active-low output-enable (OE) inputs. To ensure the high-impedance state during power up or power down, OE should be tied to Vdd through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The family offers both I/O Tolerant, which allows it to operate in mixed 1.8/3.6V systems, and Bus Hold, which retains the data inputs last state whenever the data input goes to high-impedance, preventing floating inputs and eliminating the need for pullup/ down resistors.