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Partname: | PI6C2504AQ |
Description: | Phase-locked loop clock driver with 4 clock outputs |
Manufacturer: | |
Package: | QSOP |
Pins: | 16 |
Oper. temp.: | 0 to 70 |
Datasheet: | PDF (292K). Click here to download *) |
The PI6C2504A features a low-skew, low-jitter, phase-locked loop (PLL) clock driver, distributing high-frequency clock signals for SDRAM and server applications. By connecting the feedback FB_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to any clock output will be nearly zero. |
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![Click here to download PI6C2504AQ Datasheet](../../../pndecoder/datasheets/PERIC/img/000168.gif) Click here to download PI6C2504AQ Datasheet*) |
![](http://www.chipdocs.com/common/img/1x10t.gif) |
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