The NB4N316M is a differential Clock or Data receiver and will accept AnyLevel t input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to CML, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB4N316M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The CML outputs are 16 mA open collector (see Figure 18) which requires resistor (RL) load path to VTT termination voltage (see Figure 19). The open collector CML outputs must be terminated to VTT at power up. The differential outputs produce CurrentMode Logic (CML) compatible levels when the receiver is loaded with 50 W or 25 W loads connected to 1.8 V, 2.5 V or 3.3 V supplies. This simplifies device interface by eliminating a need for coupling capacitors.