|
|
Partname: | NB3N3001 |
Description: | 3.3 V 106.25 MHz/ 212.5 MHz PureEdge Clock Generator with LVPECL Differential Output |
Manufacturer: | ON Semiconductor |
Datasheet: | PDF (115K). Click here to download *) |
The NB3N3001 is a low-jitter, dual-rate PLL-synthesized clock generator. It accepts a standard 26.5625 MHz fundamental mode AT cut parallel resonant crystal as the reference source for its integrated crystal oscillator and low noise phase-locked loop (PLL) and produces user selectable clock frequencies of either 106.25 MHz or 212.5 MHz. In addition, the PLL circuitry will generate a 50% duty cycle square-wave through a pair of differential LVPECL clock outputs. Typical phase jitter at 106.25 MHz is 0.3 ps RMS from 637 kHz to 10 MHz. |
|
Click here to download NB3N3001 Datasheet*) |
|
*)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |
|
|
|