The HC4046A phaselocked loop contains three phase comparators, a voltagecontrolled oscillator (VCO) and unity gain opamp DEMOUT. The comparators have two common signal inputs, COMP IN, and SIG IN. Input SIG IN and COMP IN can be used directly coupled to large voltage signals, or indirectly coupled (with a series capacitor to small voltage signals). The selfbias circuit adjusts small voltage signals in the linear region of the amplifier. Phase comparator 1 (an exclusive OR gate) provides a digital error signal PC1 OUT and maintains 90 degrees phase shift at the center frequency between SIG IN and COMP IN signals (both at 50% duty cycle). Phase comparator 2 (with leadingedge sensing logic) provides digital error signals PC2 OUT and PCP OUT and maintains a 0 degree phase shift between SIG IN and COMP IN signals (duty cycle is immaterial). The linear VCO produces an output signal VCOOUT whose frequency is determined by the voltage of input VCO IN signal and the capacitor and resistors connected to pins C1A, C1B, R1 and R2. The unity gain opamp output DEMOUT with an external resistor is used where the VCO IN signal is needed but no loading can be tolerated. The inhibit input, when high, disables the VCO and all opamps to minimize standby power consumption.