The MC10H/100H607 is a 6-bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48 mA sink, 24 mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset control is an ECL level input. With its differential PECL inputs and TTL outputs the H607 device is ideally suited for the receive function of a HPPI bus type board-to-board interface application. The on chip registers simplify the task of synchronizing the data between the two boards. The device is available in either ECL standard: the 10H device is compatible with MECL 10HTM logic levels, with a VCC of +5.0 V, while the 100H device is compatible with 100K logic levels, with a VCC of +5.0 V.