|
|
|
|
| Partname: | MC100E431FNR2 |
| Description: | 3-Bit Diff Set/Reset Flip-Flop |
| Manufacturer: | ON Semiconductor |
| Package: | PLCC |
| Pins: | 28 |
| Datasheet: | PDF (109K).
Click here to download *) |
The asynchronous Set and Reset controls are edge-triggered rather than level controlled. This allows the user to rapidly set or reset the flip-flop and then continue clocking at the next clock edge, without the necessity of de-asserting the set/reset signal (as would be the case with a level controlled set/reset). |
|
Click here to download MC100E431FNR2 Datasheet*) |
 |
| *)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |
|
|
|
