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| Partname: | MC100E143FNR2 |
| Description: | 9-Bit Hold Register |
| Manufacturer: | ON Semiconductor |
| Package: | PLCC |
| Pins: | 28 |
| Datasheet: | PDF (108K).
Click here to download *) |
The SEL (Select) input pin is used to switch between the two modes of operation -- HOLD and LOAD. Input data is accepted by the registers a set-up time before the positive going edge of CLK1 or CLK2. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero. Pinout: 28-Lead PLCC (Top View) SEL |
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Click here to download MC100E143FNR2 Datasheet*) |
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