The NCP5210, 3-in-1 PWM Dual Buck and Linear DDR Power Controller, is a complete power solution for MCH and DDR memory. This IC combines the efficiency of PWM controllers for the VDDQ supply and the MCH core supply voltage with the simplicity of linear regulator for the VTT termination voltage. This IC contains two synchronous PWM buck controller for driving four external N-Ch FETs to form the DDR memory supply voltage (VDDQ) and the MCH regulator. The DDR memory termination regulator (VTT) is designed to track at the half of the reference voltage with sourcing and sinking current. Protective features include, soft-start circuitry, undervoltage monitoring of 5VDUAL and BOOT voltage, and thermal shutdown. The device is housed in a thermal enhanced space-saving QFN-20 package.