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Partname:SCANSTA111_05
Description: Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
Manufacturer:National Semiconductor
Datasheet:PDF (911K).
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The SCANSTA111 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA111 supports up to 3 local IEEE1149.1 scan rings which can be accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs. Backplane and inter-board testing can easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested.

Click here to download SCANSTA111_05 Datasheet
Click here to download SCANSTA111_05 Datasheet
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