These TRI-STATE bi-directional buffers utilize advanced silicon-gate CMOS technology and are intended for two-way asynchronous communication between data buses They have high drive current outputs which enable high speed operation even when driving large bus capacitances These circuits possess the low power consumption and high noise immunity usually associated with CMOS circuitry yet have speeds comparable to low power Schottky TTL circuits These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending on the logic levels at the enable inputs Both buses can be isolated from each other with proper logic levels at the enable inputs When GAB is taken high and GBA is taken low these devices store the states presently appearing at the data inputs The 8-bit codes appearing on the two sets of buses will be indentical for the 623 option or complimentary for the 620 option