These high speed synchronous counters utilize advanced silicon-gate CMOS technology They possess the high noise immunity and low power consumption of CMOS technology along with the speeds of low power Schottky TTL These circuits are synchronous reversible up down counters The MM54HC191 MM74HC191 are 4-bit binary counters and the MM54HC190 MM74HC190 are BCD counters Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change simultaneously when so instructed by the steering logic This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters The outputs of the four master-slave flip-flops are triggered on a low-to-high level transition of the clock input if the enable input is low A high at the enable input inhibits counting The direction of the count is determined by the level of the down up input When low the counter counts up and when high it counts down