The MM54HC166 MM74HC166 high speed 8-BIT PARALLEL-IN SERIAL-OUT SHIFT REGISTER utilizes advanced silicon-gate CMOS technology It has low power consumption and high noise immunity of standard CMOS integrated circuits along with the ability to drive 10 LS-TTL loads These Parallel-In or Serial-In Serial-Out shift registers feature gated CLOCK inputs and an overriding CLEAR input The load mode is established by the SHIFT LOAD input When high this input enables the SERIAL INPUT and couples the eight flip-flops for serial shifting with each clock pulse When low the PARALLEL INPUTS are enabled and synchronous loading occurs on the next clock pulse During parallel loading serial data flow is inhibited Clocking is accomplished on the low-to-high level edge of the CLOCK pulse through a 2-input NOR gate permitting one input to be used as a clock enable or CLOCK INHIBIT function Holding either of the clock inputs high inhibits clocking holding either low enables the other clock input This allows the system clock to be free running and the register can be