| 
   
   | 
  
   
    
     
       
      | 
     
    
     | 
 
 
 
 
    
 
  
   
    | Partname: | LM5025SDX |  
    | Description: | V(in): -0.3 to 100V; active clamp voltage mode PWM controller |     
    | Manufacturer: | National Semiconductor |  
    | Package: | LLP |  
    | Pins: | 16 |  
    | Oper. temp.: | -40 to 125 |  
    | Datasheet: | PDF (316K). Click here to download *) |  
    The LM5025 PWM controller contains all of the features necessary to implement power converters utilizing the Active Clamp / Reset technique. The device can be configured to control either a P-Channel clamp switch or an N-Channel clamp switch. With the active clamp technique, higher efficiencies and greater power densities can be realized compared to conventional catch winding or RDC clamp / reset techniques. Two control outputs are provided, the main power switch control (OUT_A) and the active clamp switch control (OUT_B). The active clamp output can be configured for either a guaranteed overlap time (for P-Channel switch applications) or a guaranteed deadtime (for N_Channel applications). The two internal compound gate drivers parallel both MOS and Bipolar devices, providing superior gate drive characteristics. This controller is designed for high-speed operation including an oscillator frequency range up to 1MHz and total PWM and current sense propagation delays less than 100ns. The LM5025 includes a high-voltage start-up regulator that operates over a wide input range of 13V to 90V. Additional features include: Line Under Voltage Lockout (UVLO), softstart, oscillator UP/DOWN sync capability, precision reference and thermal shutdown.  |  
    
   | 
    Click here to download LM5025SDX Datasheet*) | 
  
   |  
 | *)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |  
 
      | 
     
    
   | 
  
   
   |