|
|
|
|
| Partname: | JM38510/34102SF |
| Description: | Dual JK (Note: Overbar Over the K) Positive Edge-Triggered Flip-Flop |
| Manufacturer: | National Semiconductor |
| Package: | Cerpack |
| Pins: | 16 |
| Datasheet: | PDF (133K).
Click here to download *) |
The 'F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to 'F74 data sheet) by connecting the J and K inputs. Asynchronous Inputs: |
|
Click here to download JM38510/34102SF Datasheet*) |
 |
| *)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |
|
|
|
