The DS92LV2411 (Serializer) / DS92LV2412 (Deserializer) chipset translates a parallel 24bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size and interconnect cost for transferring a 24-bit, or less, bus over FR-4 printed circuit board backplanes, differential or coax cables. In addition to the 24-bit data bus interface, the DS92LV2411/12 also features a 3-bit control bus for slow speed signals. This allows implementing video and display applications with up to 24bits per pixel (RGB888), or embedding audio information with compressed video formats. Programmable transmit de-emphasis, receive equalization, on-chip scrambling and DC balancing enables long distance transmission over lossy cables and backplanes. The DS92LV2412 automatically locks to incoming data without an external reference clock or special sync patterns, providing easy "plug-and-go" or "hot plug" operation. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking capability. The DS92LV2411/12 chipset is programmable though an I2C interface as well as through pins. A built-in AT-SPEED BIST feature validates link integrity and may be used for system diagnostics.