The DS8615 series products are low power dual modulus prescalers which divide by 32 33 and 40 41 respectively The modulus control (MC) input selects division by N when at a high TTL level and division by N a 1 when at a low TTL level The clock inputs are buffered providing 40 100 mVrms input sensitivity The two outputs provide the user the option to wire either a totem-pole or open-collector output structure Additionally the user can wire a resistor between the two output pins to minimize edge transition emissions The outputs are designed to drive positive edge triggered PLLs These products can be operated from either an unregulated 5 5V to 13 5V source or regulated 5V g 10% source Unregulated operation is obtained by connecting VS to the source with VREG open Regulated operation is obtained by connecting both VS and VREG to the supply source