The DP8440 41 Dynamic RAM Controllers provide an easy interface between dynamic RAM arrays and 8- 16- 32- and 64-bit microprocessors The DP8440 41 DRAM Controllers generate all necessary control and timing signals to successfully interface and design dynamic memory systems With significant enhancements over the DP8420 21 22 predecessors the DP8440 41 are suitable for high performance memory systems These controllers support page and burst accesses for fast page static column and nibble DRAMs Refreshes and accesses are arbitrated on chip RAS low time during refresh and RAS precharge time are guaranteed by these controllers Separate precharge counters for each RAS output avoid delayed back to back accesses due to precharge when using memory interleaving Programmable features make the DP8440 41 DRAM Controllers flexible enough to fit many memory systems